chore(buglog): bug-1881 fixed; live default-settings replay proof (libxce-alloc-preason-equality 5.3)

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
This commit is contained in:
Rongsong Shen 2026-09-29 06:49:22 +00:00
parent 4e57bde693
commit 3fba376a37
Signed by untrusted user: rshen
GPG key ID: 80533536B0EB651C

View file

@ -1,8 +1,8 @@
---
id: "bug-1881"
status: "partial"
status_updated: "2026-09-28"
status_note: "mismatch lines now carry a first-difference diff (24b05718); live default-speed replay proof waits on spec scheduler-sim-discrete-clock (task 5.3)"
status: "fixed"
status_updated: "2026-09-29"
status_note: ""
component: "scheduler"
severity: "wrong-result"
timestamp: "2026-09-28T07:26:09Z"
@ -11,6 +11,7 @@ occurrences: 1
files: ["src/scheduler/src/sim_verify.c"]
tags: ["scheduler", "sim", "sim-verify", "logging"]
related: []
fix_commits: ["24b05718", "c1960457", "2d7ba660", "4e57bde6"]
---
# bug-1881: sim_log_mismatch prints identical expected/actual, hiding the field that differs
@ -45,12 +46,12 @@ sim_log_mismatch() (src/scheduler/src/sim_verify.c) summarizes each decision as
## Fix
Spec libxce-alloc-preason-equality (commits 8f25c1c3..dcf3acf3). sim_decision_eq() now compares DISPATCH decisions with libxce's public job_alloc_eq() and returns a caller-owned first-difference description (`char** why`) naming the field path and both values; sim_log_mismatch() appends it as ` -- diff: <why>`, and the replay loop in sim_loop.c passes and frees it (fixed text "no live decision" for leftover recorded decisions) — 24b05718. job_alloc_eq() also compares `from`, so the scheduler now stamps every allocation's `from` with the deciding session's start (scheduler.c sched_make_primary_alloc_, c1960457) and the normal-mode recorder takes beginRound from the same reading (driver.c, 2d7ba660), making `from` reproducible on replay.
Remaining: the simulator's own session-begin clock read (sim_loop.c) still drifts at --sim-speed >= 1, so a live default-settings replay cannot yet be shown to report zero `from` mismatches. That is task 5.3, blocked on spec scheduler-sim-discrete-clock.
The remaining gap (the simulator's own session-begin clock read drifting at --sim-speed >= 1) was closed by spec scheduler-sim-discrete-clock (4f653d8f..d9bc36cd: the simulator clock is pinned to recorded timestamps, --sim-speed is a no-op), so a replayed session starts at exactly the recorded beginRound and every replayed `from` matches; task 5.3 adds the proof (4e57bde6).
## Verification
- Test: TODO: name + file; RED before the fix, GREEN after
- Suites: TODO: suite results and build profile
- Live: TODO: soak/deploy run, or n/a and why
- Test: test_log_mismatch_appends_provided_description and test_verify_against_altered_copy_reports_exact_mismatch (asserts ` -- diff: main_reason: 99 != 0`) plus test_verify_leftover_recorded_decision_names_missing_side in src/scheduler/testsuite/test_sim_verify.c: RED before 24b05718 (no diff text on the MISMATCH line), GREEN after. test_sim_replay_reproduces_recorded_alloc_from in src/scheduler/testsuite/test_sim_live_allocation.c (4e57bde6): GREEN at default settings; a +0.5 s clock mutant at sim_loop.c's sim_advance_virtual_clock(sim, begin_round) makes it FAIL
- Suites: ASAN debug build (src/xce.build.discrete), `meson test --no-suite xceadmin`: 117/117 OK, 0 Unity :FAIL lines, 0 sanitizer reports (2026-09-29)
- Live: 2-round sequential HA soak (/home/claude/tmp/xce-alloceq-53, PASS, zero job loss) recorded 3 clean .replay files with 11 DISPATCH decisions; each replayed with `xce_scheduler --sim --sim-verify` and no --sim-speed (ASAN_OPTIONS=detect_leaks=0): rc=0, 0 MISMATCH lines
## References
- Related: bug-1880