myxce/.kiro/specs/scheduler-sim-repl-verbosity
Rongsong Shen cc78d09140
feat(scheduler-sim-repl-verbosity): task 3.2 - implement Event Echo Gate
Implements mode-aware event echo classification, job-arrival range
compression (Req 4.5), and round-collapse flush wiring at all 3
breakpoint-match/structural-event call sites (Requirements 1.1-1.4,
3.5, 3.6). All 4 of task 3.1's tests pass; also closes bug-1609
("continue is as verbose as step").

repl_break.c grew 827->905 lines (13% over the 800-line cap). Unlike
task 2.2's Round Rollup, this logic is wiring inside pre-existing
driver-facing hooks, not a relocatable subsystem - accepted in place
per design.md's established residual-tolerance precedent.

Review independently investigated a one-off ASAN stack-use-after-return
in an unrelated test (sched_sim_record_output_test) surfaced by this
change's stack-layout perturbation: traced to the same documented
pre-existing thread-lifecycle bug class as bug-1598/bug-1632 (an
unjoined picker thread reading a stack-local sim after test-function
return), confirmed via 11/11 clean reruns - logged as bug-1763, not a
regression from this task.

Co-Authored-By: Claude Sonnet 5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01YAWMhfRJFnmmnG8h97yUDd
2026-09-02 13:00:09 +00:00
..
design.md feat(scheduler-sim-repl-verbosity): task 3.2 - implement Event Echo Gate 2026-09-02 13:00:09 +00:00
requirements.md docs(scheduler-sim-repl-verbosity): expand spec with Requirements 5.5, 6, 7 2026-09-02 08:40:43 +00:00
research.md docs(scheduler-sim-repl-verbosity): add approved spec (requirements/design/tasks) 2026-08-22 02:45:52 +00:00
spec.json docs(scheduler-sim-repl-verbosity): expand spec with Requirements 5.5, 6, 7 2026-09-02 08:40:43 +00:00
tasks.md feat(scheduler-sim-repl-verbosity): task 3.2 - implement Event Echo Gate 2026-09-02 13:00:09 +00:00